Dopant diffusion blocking for optoelectronic devices using InAlAs or InGaAlAs

ABSTRACT

A method for decreasing the diffusion of dopant atoms in the active region, as well as the interdiffusion of different types of dopant atoms among adjacent doped regions, of optoelectronic devices is disclosed. The method of the present invention employs a plurality of InAlAs and/or InGaAlAs layers to avoid the direct contact between the dopant atoms and the active region, and between the dopant atoms in adjacent blocking structures of optoelectronic devices. A semi-insulating buried ridge structure, as well as a ridge structure, in which the interdiffusion of different types of dopant atoms is suppressed are also disclosed.

FIELD OF THE INVENTION

[0001] The present invention relates to a method for fabricatingoptoelectronic devices, such as lasers, modulators, optical amplifiers,and detectors, and in particular to a method and device for reducing thediffusion and/or interdiffusion of dopant atoms among differently dopedregions of such optoelectronic devices.

BACKGROUND OF THE INVENTION

[0002] Blocking layers are increasingly important for optoelectronicdevices. For example, in a buried heterostructure of a semiconductorlaser diode, blocking layers confer superior characteristics, such aslow oscillatory threshold value and stable oscillation transverse mode,as well as high quantum efficiency and high characteristic temperature.This is because, in the buried heterostructure laser diodes, a currentblocking layer can be formed on both sides of an active layer formedbetween two clad layers having a large energy gap and a small refractiveindex. This way, current leakage during operation is substantiallyreduced, if not prevented.

[0003] A conventional method for the fabrication of semiconductor laserdiodes having a semi-insulating buried ridge is exemplified in FIGS. 1-7and described below.

[0004] Referring to FIG. 1, the processing steps for fabricating a laserdiode with a buried ridge begin with the formation of a multi layeredstructure 100 on an n-InP substrate 10. The multi layered structure 100is formed of a first n-InP cladding layer 12, an active layer 14, asecond p-InP cladding layer 16, and a layer 18 of a quaternary material(Q). Layers 12, 14, 16 and 18 are sequentially formed and successivelyepitaxially grown to complete a first crystal growth. The active layer14 could be, for example, a multiple quantum well (MQW) structure formedof undoped InGaAs/InGaAsP pairs and formed by a Metal Organic ChemicalVapor Deposition (MOCVD) or Metal Organic Vapor Phase Epitaxy (MOVPE).Also, the second cladding layer 16 may be doped with a p-type dopant,the most common one being zinc (Zn).

[0005] Next, as shown in FIG. 2, a SiO₂ or Si₃N₄ mask 20 is formed intoa stripe on the upper surface of layer 18. Subsequently, the multilayered structure 100 is selectively etched down to the n-InP substrate10 to produce a mesa stripe 50, as illustrated in FIG. 3. The mesastripe 50, which has the mask 20 on top, is then introduced into agrowth system, such as a liquid phase epitaxial, a MOCVD, a molecularbeam epitaxy (MBE), or vapor phase epitaxy (VPE) growth system, so thatan InP current blocking layer 32 and an n-InP current blocking layer 34are subsequently formed, as shown in FIG. 4. The current blocking layers32 and 34 surround the mesa stripe 50 and form a second crystal growth.

[0006] The first current blocking layer 32 may be doped with impurityions, such as iron (Fe), ruthenium (Ru) or titanium (Ti), to form asemi-insulating (si) InP(Fe) blocking layer 32. The addition ofFe-impurity ions increases the resistivity of the first current blockinglayer 32 and reduces the leakage current that typically occurs at theinterface between the substrate 10 and the first current blocking layer32. Similarly, the second current blocking layer 34 may be doped withimpurity ions, such as silicon (Si), sulfur (S) or tin (Sn), to form ann-type InP-doped blocking layer 34.

[0007] Referring now to FIG. 5, after removal of the mask 20, a thirdcrystal growth is performed on the upper surfaces of the second currentblocking layer 34 and the Q layer 18. Thus, a p-InP cladding layer 42(also called a burying layer) and a p-InGaAsP or a p-InGaAs ohmiccontact layer 44 are further grown to form a buried heterostructure. Thecladding layer 42 may be also doped with p-type impurity ions, such aszinc (Zn), magnesium (Mg), or beryllium (Be), to form a p-type InP-dopedcladding layer 42. Since Zn is the most commonly used p-type dopant, thecladding layer 42 will be referred to as layer InP(Zn)-doped.

[0008] The method of fabricating the above structure poses three majordrawbacks, all of them relating to the diffusion and interdiffusion ofdopant atoms, particularly those of zinc, since zinc is the most commonand widely used p-type dopant in the optoelectronic industry.

[0009] First, zinc diffusion occurs into the active region of thesemi-insulating buried ridge. FIG. 5 shows the diffusion of zinc in thedirection of arrow A, from the doped p-InP(Zn) second cladding layer 16into the active layer 14, because of the direct contact between the twolayers. The high diffusivity of zinc leads to an undesirable shift inthe emitting wavelength, up to tenths of microns. The reshaping of theoverall zinc distribution profile further impacts the electricalcharacteristics of the optoelectronic device. The excess of zinc in theactive region 14 of the device structure also results in the degradationof various device characteristics, such as the extinction ratio and thejunction capacitance of the electro-absorption modulator structures.

[0010] Second, iron-zinc (Fe—Zn) interdiffusion occurs at the interfacebetween the doped p-InP(Zn) second cladding layer 16 and thesemi-insulating InP(Fe) first current blocking layer 32. FIG. 5 showsthe diffusion of zinc in the direction of arrow B₁, from the p-InP(Zn)second cladding layer 16 into the InP(Fe) first current blocking layer32. Similarly, arrow B₂ of FIG. 5 illustrates the diffusion of iron fromthe InP(Fe) first current blocking layer 32 into the p-InP(Zn) secondcladding layer 16.

[0011] Third, iron-zinc (Fe—Zn) interdiffusion occurs in the blockingstructures of the laser devices, more precisely at the interface betweenthe semi-insulating InP (Fe) first current blocking layer 32 and thep-InP(Zn) cladding layer 42. The problem arises because the Fe-doped InPcurrent blocking layer 32, which was initially covered by the mask 20,comes into contact with the Zn-doped InP cladding layer 42 after theremoval of the mask 20. The contact regions are exemplified in FIGS. 5as regions D, situated on lateral sides of the mesa stripe 50. Theinterdiffusion of Fe and Zn atoms at the regions D can significantlyincrease the leakage current and degrade the device, leading to a poormanufacturing yield. In addition, if the active layer 14 has a multiplequantum well (MQW) structure, the Zn impurities in the Zn-doped InPcladding layer 42 can enter the active layer 14 to form mixed crystalstherein and practically reduce the quantum effect to zero.

[0012] In an effort to suppress the diffusion and interdiffusion of Zndopant atoms, different techniques have been introduced in the ICfabrication. For example, one technique of the prior art, shown in FIG.6, considered the incorporation of a zinc doping set-back into thedevice structure, such as an undoped InP layer 52. The undoped InP layer52 is grown after the growth of the active layer 14, but before thegrowth of the p-InP second cladding layer 16, to prevent therefore thedirect contact between zinc and the active region. In lieu of theundoped InP layer 52, a silicon doped n-InP(Si) layer may be used alsoas a dopant set-back.

[0013] Although the above technique has good results in preventing theZn diffusion, its processing steps require extremely sensitiveparameters, such as doping level and thickness, of the zinc-dopedcladding and contact layers. Also, growth conditions, such as growthrate and temperature, must be very narrowly tailored so that theset-back is optimized for each device structure and for each reactor.Further, this method does not allow control over the shape of the finalzinc distribution. Finally, when a silicon doped n-InP(Si) layer isalternatively used as a dopant set-back, the incorporated silicon, whichis an n-type dopant, forms an additional and undesirable p-n junction onthe p-side of the device.

[0014] Another technique of the prior art that tried to minimize thezinc-iron interdiffusion is exemplified in FIG. 7. This techniquecontemplates the insertion of an intrinsic or undoped InP layer 70between the Fe-doped InP current blocking layer 32 and the Zn-doped InPcladding layer 42, to prevent the contact between the InP(Fe) layer andInP(Zn) layer and to eliminate the iron-zinc interdiffusion and theconsequent leakage current. This technique, however, has a majordrawback in that it affects the p-n junction between the n-InP secondcurrent blocking layer 34 and the p-InP burying layer 42. Specifically,the addition of an intrinsic InP layer modifies the p-n junction thatshould be in the active region of a laser device, and creates instead ap-i-n junction that alters the device characteristics altogether.Further, this method is insufficient to completely prevent the iron-zincinterdiffusion in areas close to the active region of the device.

[0015] Accordingly, a method for forming a mesa stripe foroptoelectronic devices, which is inexpensive to implement and capable ofdecreasing the leakage current and the interdiffusion of dopant atoms isneeded. There is also a need for an optoelectronic semiconductor devicehaving good operating characteristics with reduced impurity atomsinterdiffusion, reduced leakage current, and improved accuracy andoperation reliability.

SUMMARY OF THE INVENTION

[0016] The present invention provides a method for reducing thediffusion and/or interdiffusion of dopant atoms between differentlydoped regions of semi-insulating buried ridge structures of forwardbiased devices, such as lasers and optical amplifiers, and of reversebiased devices, such as electroabsorption modulators and detectors.

[0017] In a first embodiment of the present invention, either an InAlAs(indium aluminum arsenide) or an InGaAlAs (indium gallium aluminumarsenide) layer is grown on top of the active region, and before thezinc-doped cladding layer and the subsequent contact layer are grown.The blocking of zinc diffusion into the active layer by the insertion ofa thin InAlAs or InGaAlAs layer allows a precise placement of the p-ijunction, at less than 100 Angstroms, as well as minimal doping into theactive region.

[0018] In a second embodiment of the present invention, an InAlAs or anInGaAlAs layer is first selectively grown on top of the active regionand around the mesa structure, and only then are conventional InP andn-InP current blocking layers, which form a second crystal growth aroundthe mesa, grown over the InAlAs or InGaAlAs layer. This way, the lateralinterdiffusion between Fe atoms, from the InP(Fe) current blockinglayer, and the Zn atoms, from-the p-InP(Zn) second cladding layersituated on top of the active region, is suppressed since no contactbetween the two doped regions exists.

[0019] In yet a third embodiment of the invention, a plurality of InAlAsand/or InGaAlAs layers are grown on top of the active region and aroundthe mesa structure, as well as in lieu of the conventional secondcurrent blocking layer of the second crystal growth.

[0020] A fourth embodiment of the present invention is structurallysimilar to the third embodiment. However, in the fourth embodiment, theInP(Fe) current blocking layer is grown between two adjacent InAlAsand/or InGaAlAs layers, so that the InP(Fe) layer has minimal contactwith the mask situated on top of the mesa stripe.

[0021] According to fifth and sixth embodiments of the presentinvention, a plurality of InAlAs and/or InGaAlAs layers are grown on topof the active region and around the mesa structure, as well as inbetween the blocking layers forming the second crystal growth. In thefifth embodiment, an InAlAs and/or InGaAlAs layer is grown after the twocurrent blocking layers have been formed and as part of the secondcrystal growth. Conversely, in the sixth embodiment, an InAlAs and/orInGaAlAs layer is grown as part of the third crystal growth and beforethe top cladding layer is formed. In any case, these multiple InAlAsand/or InGaAlAs layers suppress the interdiffusion between Fe atoms,from the InP(Fe) current blocking layer, and the Zn atoms, from thep-InP(Zn) cladding layer of the third crystal growth. Multiple InAlAsand/or InGaAlAs layers may be incorporated in the blocking and/orcladding structures to confer optimized performance to theoptoelectronic devices.

[0022] The above and other advantages of the present invention will bebetter understood from the following detailed description of thepreferred embodiments, which is provided in connection with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0023]FIG. 1 illustrates a cross-sectional view of a buriedheterostructure laser diode at an intermediate stage of processing inaccordance with a method of the prior art.

[0024]FIG. 2 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 1, in accordance with a method of the prior art andat a stage of processing subsequent to that shown in FIG. 1.

[0025]FIG. 3 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 1 at a stage of processing subsequent to that shownin FIG. 2.

[0026]FIG. 4 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 1 at a stage of processing subsequent to that shownin FIG. 3.

[0027]FIG. 5 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 1 at a stage of processing subsequent to that shownin FIG. 4.

[0028]FIG. 6 is a cross-sectional view of a modified buriedheterostructure laser diode of FIG. 1 and depicting an undoped InP layergrown on the active region of the laser diode.

[0029]FIG. 7 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 1 at a stage of processing subsequent to that shownin FIG. 5, and depicting an intrinsic InP layer.

[0030]FIG. 8 illustrates a cross-sectional view of a buriedheterostructure laser diode at an intermediate stage of processing andin accordance with a first embodiment of the present invention.

[0031]FIG. 9 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 8 at a stage of processing subsequent to that shownin FIG. 8.

[0032]FIG. 10 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 8 at a stage of processing subsequent to that shownin FIG. 9.

[0033]FIG. 11 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 8 at a stage of processing subsequent to that shownin FIG. 10.

[0034]FIG. 12 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 8 at a stage of processing subsequent to that shownin FIG. 11.

[0035]FIG. 13 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 8 at a stage of processing subsequent to that shownin FIG. 12.

[0036]FIG. 14 is a cross-sectional view of a buried heterostructurelaser diode at an intermediate stage of processing and in accordancewith a second embodiment of the present invention.

[0037]FIG. 15 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 14 at a stage of processing subsequent to that shownin FIG. 14.

[0038]FIG. 16 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 14 at a stage of processing subsequent to that shownin FIG. 15.

[0039]FIG. 17 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 14 at a stage of processing subsequent to that shownin FIG. 16.

[0040]FIG. 18 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 17 but which includes an InAlAs or InGaAlAs layer ontop of the active region of the heterostructure laser diode.

[0041]FIG. 19 is a cross-sectional view of a buried heterostructurelaser diode at an intermediate stage of processing and in accordancewith a third embodiment of the present invention.

[0042]FIG. 20 is a cross-sectional view of a buried heterostructurelaser diode at an intermediate stage of processing and in accordancewith a fourth embodiment of the present invention.

[0043]FIG. 21 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 20 at a stage of processing subsequent to that shownin FIG. 20.

[0044]FIG. 22 is a cross-sectional view of a buried heterostructurelaser diode at an intermediate stage of processing and in accordancewith a fifth embodiment of the present invention.

[0045]FIG. 23 is a cross-sectional view of the buried heterostructurelaser diode of FIG. 22 at a stage of processing subsequent to that shownin FIG. 22.

[0046]FIG. 24 is a cross-sectional view of a buried heterostructurelaser diode at an intermediate stage of processing and in accordancewith a sixth embodiment of the present invention.

[0047]FIG. 25 is a cross-sectional view of a further embodiment of thepresent invention depicting a ridge structure for an optelectronicdevice at an intermediate stage in the processing.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0048] In the following detailed description, reference is made tovarious specific embodiments in which the invention may be practiced.These embodiments are described with sufficient detail to enable thoseskilled in the art to practice the invention, and it is to be understoodthat other embodiments may be employed, and that structural andelectrical changes may be made without departing from the invention.Accordingly, the following detailed description is not to be taken in alimiting sense and the scope of the present invention is defined by theappended claims.

[0049] The present invention provides a method for decreasing thediffusion of dopant atoms in the active region, as well as theinterdiffusion of different types of dopant atoms among adjacent dopedregions of semi-insulating buried ridge structures of laser devices oroptical amplifiers, and of ridge structures of electroabsorptionmodulators or detectors. The method of the present invention employs aplurality of InAlAs and/or InGaAlAs layers to avoid the direct contactbetween the dopant atoms and the active region, and between the dopantatoms in adjacent blocking structures of optoelectronic devices.

[0050] The term “p-type dopant” used in the following description mayinclude any p-type impurity ions, such as zinc (Zn), magnesium (Mg), orberyllium (Be), among others. Since Zn is the most commonly used p-typedopant, reference to the p-type dopant will be made in this applicationas to Zn dopant. Although the present invention will be described anddemonstrated above with respect to Zn dopant, it is anticipated that theplurality of InAlAs and/or InGaAlAs layers of the present invention willserve to block other p-type dopants as well.

[0051] Similarly, the term “n-type dopant” used in the followingdescription may include any n-type impurity ions, such as silicon (Si),sulfur (S), or tin (Sn), among others. Although reference to the n-typedopant will be made in this application as to Si dopant, and althoughthe present invention will be described with respect to Si dopant, it isanticipated that the plurality of InAlAs and/or InGaAlAs layers of thepresent invention will serve to block other n-type dopants as well.

[0052] The term “semi-insulating-type impurity” used in the followingdescription may include any impurity ions, such as iron (Fe), ruthenium(Ru) or titanium (Ti), that form semi-insulating blocking layers. SinceFe is the most commonly used semi-insulating type impurity, reference tothe semi-insulating-type dopant will be made in this application as toFe dopant. Also, although the present invention will be described anddemonstrated above with respect to Fe, it is anticipated that theplurality of InAlAs and/or InGaAlAs layers of the present invention willserve to block other semi-insulating-type dopants as well. Accordingly,the following detailed description must not be taken in a limitingsense, the scope of the present invention being defined by the appendedclaims.

[0053] Referring now to the drawings, where like elements are designatedby like reference numerals, FIGS. 8-13 illustrate the fabrication methodof the first embodiment of a buried semi-insulating ridgeheterostructure 201 (FIG. 13) of the present invention, in which Zndiffusion into the active region of the optoelectronic device issuppressed.

[0054] First, as shown in FIG. 8, preferably on an n-InP substrate 110having a <100> plane as a main plane, a first cladding layer 112 ofn-InP and an active layer 114 having a quantum well structure of InGaAsPare preferably successively epitaxially grown. It must be noted that,although the Metal Organic Vapor Phase Epitaxy (MOVPE) method ispreferred, a Liquid Phase Epitaxy (LPE) method, a Vapor Phase Epitaxy(VPE) method, or a Molecular Beam Epitaxy (MBE) could also be used as analternative. As known in the art, the active layer 114 should be capableof absorbing, emitting, amplifying, or modulating light, depending onthe particular type of optoelectronic device. Also, although the presentinvention refers to an exemplary n-type substrate on which operativelayers form an n-p junction around an active area, it is to beunderstood that the present invention also contemplates a p-typesubstrate on which a corresponding p-n junction is formed around anactive area.

[0055] Further, although the embodiments of the present invention willbe described below with reference to an InAlAs layer as blocking thediffusion and/or interdiffusion of different types of dopant impurities,it must be understood that same processing conditions and proceedingsare applicable for an InGaAlAs layer used as a diffusion blocking layer.Thus, the present invention is not limited to the use of InAlAs as adopant diffusion blocking layer, and the invention has equalapplicability to the use of InGa as a dopant diffusion blocking layer,or a combination of InAlAs and InGaAlAs layers.

[0056] As next illustrated in FIG. 9, an InAlAs layer 115 is formed ontop of the active layer 114. The InAlAs layer 115 may be, for example,epitaxially grown up to a thickness of between approximately 300Angstroms to approximately 800 Angstroms, by either the MOVPE or the LPEmethod. Although the embodiments of the present invention will bedescribed with reference to the InAlAs and/or InGaAlAs layer 115 beingformed on top of the active region 114, it must be understood that theactive region may be also bounded on at least one side by the dopantblocking layer. The term “bounded” in the context of this applicationmeans that the dopant blocking layer is in contact or spaced apart fromthe active region through another region or layer. In any case, theInAlAs layer 115 acts as a zinc diffusion barrier layer, blocking thediffusion of Zn atoms from the subsequently grown upper layers into theactive layer 114.

[0057] The incorporation of a thin layer of InAlAs offers an additionaladvantage. That is, the InAlAs layer does not introduce excess potentialbarriers for majority carriers or holes, since the InAlAs layer formstype II heterojunctions with the adjacent layers, the active layer (forexample, the active layer 114 of FIG. 10) and the cladding layer (forexample, the cladding layer 116 of FIG. 10). The InAlAs layer has a bandgap (E=1.44 eV) that is higher than the band gap of the active region(E=0.8 eV) and than the band gap of the adjacent cladding layer (forexample, E=1.35 eV for the InP cladding layer 116). Because of thesedifferences, no body of carriers is created between the cladding layerand the active region because of the lineup of the band gaps.

[0058] Next, after the formation of the InAlAs layer 115, the processingsteps for the formation of a semi-insulating buried ridge of a laserdiode proceed according to the steps described with reference to FIGS.1-5, and in accordance with the prior art. As such, a second claddinglayer 116 preferably of p-InP doped with Zn and a Q layer 118 arepreferably epitaxially grown, as illustrated in FIG. 10. Using a siliconoxide or silicon nitride mask 200 (FIG. 10), the multi layered structureof FIG. 10 is etched down to the n-InP substrate 110 to form a narrowstriped-shaped ridge structure, or a mesa stripe, 150 (FIG. 11) on thesubstrate 110. The etching may be carried out by using, for example, aconventional Br-methanol solution or a solution comprising a mixture ofoxygenated water and hydrochloric acid.

[0059] The striped-shaped ridge structure 150 of FIG. 11, which issimilar to that represented in FIG. 3, comprises portions of the firstcladding layer 112 of n-InP, of the active layer 114, of the InAlAs zincblocking layer 115, of the second cladding layer 116 of p-InP(Zn), andof the Q layer 118. As illustrated in FIG. 11, the striped-shaped ridgestructure 150 resides on an upper surface of the n-InP substrate 110.

[0060] Thereafter, striped-shaped ridge structure 150, which has on topthe mask 200, is introduced into a liquid phase epitaxial growth systemor a MOCVD growth system to preferably form a first InP current blockinglayer 132 and an n-InP current blocking layer 134, as shown in FIG. 12.Preferably, the current blocking layers 132 and 134 are grownselectively by Metal Organic Vapor Phase Epitaxy (MOVPE) around thestriped-shaped ridge structure 150. The current blocking layer 132 ispreferably doped with a semi-insulating type dopant, such as iron (Fe),ruthenium (Ru), or titanium (Ti), in the range of 1×10¹⁸ cm⁻³ to 3×10¹⁸cm⁻³, to achieve the semi-insulating (si) InP-doped current blockinglayer, in our case the first semi-insulating current blocking layerInP(Fe) 132 (FIG. 12). Similarly, the second current blocking layer 134may be doped with impurity ions such as silicon (Si), sulfur (S), or tin(Sn) to form an n-type InP-doped blocking layer 134.

[0061] Referring now to FIG. 13, after removal of the mask 200 and theoptional removal of the Q layer 118, a third crystal growth is performedon the upper surfaces of the second current blocking layer 134 and the Qlayer 118. Although the embodiments of the present invention aredescribed as having the Q layer 118 incorporated into the mesastructure, it must be understood that the present invention alsocontemplates optoelectronic devices that do not include a Q layer, suchas Q layer 118 (FIGS. 10-24). Further, although the embodiments of thepresent invention are described as having a first and a second currentblocking layers, such as current blocking layers 132 and 134 (FIGS.12-13; FIGS. 16-18; FIGS. 22-24), it must be understood that the presentinvention also contemplates optoelectronic devices with more than twocurrent blocking layers as part of the second crystal growth, forexample four current blocking layers with alternate doping conductivity.

[0062] As part of the third crystal growth, preferably a p-InP claddinglayer 142 (FIG. 13) and a p-InGaAsP or a p-InGaAs ohmic contact layer144 (FIG. 13) are further grown to form a buried heterostructure. Thecladding layer 142 is preferably liquid-phase epitaxially grown or MOCVDgrown to a thickness of 1.5 to 3 microns, preferably 2.5 microns, anddoped with a p-type impurity atom, such as zinc (Zn), magnesium (Mg) orberyllium (Be). For example, doping can be conducted with diethyl zinc(DEZ), with H2 as carrier gas and at varying temperatures, fromapproximately −15° C. to 40° C. Similarly, the ohmic contact layer 144may be, for example, a Zn-doped InGaAs preferably epitaxially grownlayer, to a thickness of approximately 3000 Angstroms.

[0063] An n-type electrode 162 (FIG. 13) is formed on the lower surfaceof the substrate 110 and a p-type electrode 164 (FIG. 13) is formed onthe upper surface of the ohmic contact layer 144, to supply a voltage tothe buried semi-insulating ridge heterostructure 201 which has an InAlAs115 layer for blocking zinc diffusion into the active region 114 of theheterostructure.

[0064] In a second embodiment of the present invention (FIGS. 14-18), anInAlAs layer is selectively grown before the formation of the currentblocking layers, which constitute the second crystal growth. Toillustrate the second embodiment, reference is now made to FIG. 14,which illustrates a striped-shaped ridge structure (mesa stripe) 151,which is similar to the striped-shaped ridge structure 150 of FIG. 11but without the InAlAs layer 115. Thus, the striped-shaped ridge 151comprises portions of a first n-InP cladding layer 112, of the activelayer 114, of the second p-InP(Zn) cladding layer 116, and of a Q layer118. As illustrated in FIG. 14, the striped-shaped ridge 151 resides onan upper surface of the n-InP substrate 110.

[0065] Referring now to FIG. 15, the mesa stripe 151 of FIG. 14 is thenintroduced into a liquid phase epitaxial growth system or a MOCVD growthsystem to form an InAlAs layer 131. Preferably, the InAlAs layer 131 isgrown selectively by Metal Organic Vapor Phase Epitaxy (MOVPE) aroundthe striped-shaped ridge structure 151 and parts of the n-InP substrate110. The InAlAs layer 131 may be epitaxially grown up to a thickness ofbetween approximately 300 Angstroms to approximately 3000 Angstroms,sufficient to allow InAlAs layer 131 to suppress the zinc-iron lateralinterdiffusion between the subsequently grown current blocking layers.

[0066] The InP first current blocking layer 132 (FIG. 16) issubsequently epitaxially grown around the striped-shaped ridge structure151 and over the InAlAs layer 131. As explained above with reference tothe first embodiment, the first current blocking layer 132 (FIGS. 12-13;FIG. 16) is doped with a semi-insulating type dopant, such as iron (Fe),in the range of 1×10¹⁸ cm⁻³ to 3×10¹⁸ cm⁻³, to form the semi-insulatingInP(Fe) first current blocking layer 132.

[0067] The insertion of the InAlAs layer 131 between the mesa stripe 151and the InP(Fe) first current blocking layer 132 prevents the directcontact between the p-InP(Zn) second cladding layer 116, which is on topof the active region 114, and the first semi-insulating current blockinglayer InP(Fe) 132. This way, the Fe—Zn lateral interdiffusion thattypically occurs in optoelectronic devices is suppressed since there isno contact between the two doped regions of the device.

[0068] At this point in the fabrication process, the subsequent stepsproceed according to those described in the first embodiment and withrespect to FIGS. 12-13. As such, once the InP(Si) second currentblocking layer 134 (FIG. 16) is grown and the mask 200 removed, a p-InPcladding layer 142 (FIG. 17) is epitaxially grown on top of the secondcurrent blocking layer 134 and on top of the Q layer 118. Similarly, ap-InGaAsP or a p-InGaAs ohmic contact layer 144 is further grown overthe p-InP cladding layer 142. Finally, an n-type electrode 162 and ap-type electrode 164 (FIG. 17) are formed on the lower surface of thesubstrate 110 and on the upper surface of the ohmic contact layer 144,respectively, so to form a complete buried semi-insulating ridgeheterostructure 202 (FIG. 17).

[0069] Although the second embodiment has been described with referenceto the mesa stripe 151 (FIGS. 14-17), which did not comprise an InAlAslayer (such as, for example, the InAlAs layer 115 of FIGS. 9-13 situatedon top of the active region 114) or an InGaAlAs layer, it must beunderstood that the mesa stripe of the optoelectronic device may alsocomprise such an additional InAlAs or InGaAlAs layer situated on top ofthe active region. Such an example is illustrated in FIG. 18, in whichthe active region 114 is bounded by two InAlAs layers 131, 115. Thisway, Fe—Zn lateral interdiffusion, as well as Zn diffusion into theactive region, are minimized and the characteristics of theoptoelectronic device are maximized.

[0070] In a third embodiment of the present invention, a plurality ofInAlAs layers are grown around the mesa structure and in betweendifferent blocking layers forming the second crystal growth, optionallywith a layer of InAlAs grown over the active region of the mesastructure. This embodiment is illustrated in FIG. 19. A buriedheterostructure laser diode 203 fabricated according to the thirdembodiment of the present invention comprises at least three InAlAslayers 115, 131, and 133. The formation of the InAlAs layers 115, 131has been discussed before with respect to the first and secondembodiments of the present invention (FIGS. 8-13; FIGS. 14-18) and itwill not be described again. The current embodiment is characterized bythe InAlAs layer 133, which is selectively grown on top of thesemi-insulating InP(Fe) first current blocking layer 132 (FIG. 19) andin lieu of the conventional n-InP(Si) second current blocking layer 134(FIGS. 17-18). The insertion of an additional InAlAs layer as a currentblocking layer further minimizes the lateral Fe—Zn interdiffusion andreduces any leakage current present in the device.

[0071] FIGS. 20-21 illustrate a fourth embodiment of the presentinvention, in which the Zn—Fe interdiffusion between the InP(Fe) firstcurrent blocking layer 132 (FIG. 19) and the p-InP(Zn) cladding layer142 (FIG. 19) is completely eliminated. In this embodiment and as shownin FIG. 20, after the epitaxial growth of the InAlAs layer 131, aselectively grown layer 136 of InP(Fe) first current blocking layer isformed over the InAlAs layer 131. This InP(Fe) first current blockinglayer 136 is grown so that its contact with the mask 200 is minimal, forexample, as illustrated in FIG. 20, just a point C on each side of themesa stripe. Of course, point C is part of a contact line (not shown)formed by the InP(Fe) first current blocking layer 136 and the mask 200.Next, the InAlAs layer 133 (FIG. 20) that replaces the conventionaln-InP(Si) second current layer 134 (FIGS. 17-18) is grown.

[0072] After removal of mask 200, the subsequent steps proceed accordingto those described in the first embodiment and with respect to FIG. 13.As such, a p-InP(Zn) cladding layer 142 and a p-InGaAsP or a p-InGaAsohmic contact layer 144 are further grown. Because of the selectivegrowth of the InP(Fe) first current blocking layer 136, the contactregions D (FIG. 5) situated on lateral sides of the mesa stripe arecompletely eliminated. Accordingly, the interdiffusion of the Fe and Znatoms between the InP(Fe) first current blocking layer 136 and thep-InP(Zn) cladding layer 142 is eliminated. Further, the insertion ofthree InAlAs layers 115, 131, 133, of which two are on each side of themesa stripe 151, suppresses any Fe—Zn interdiffusion that may beexistent in the device, to ensure proper functionality.

[0073] The structure of FIG. 21 is further completed with an n-typeelectrode 162 and a p-type electrode 164 (FIG. 21) formed on the lowersurface of the substrate 110 and on the upper surface of the ohmiccontact layer 144, to form a buried semi-insulating ridgeheterostructure 204, as illustrated in FIG. 21.

[0074] FIGS. 22-23 illustrate yet a fifth embodiment of the presentinvention. In this embodiment, the additional InAlAs 133 layer isselectively grown after both the InP(Fe) first current blocking layer132 and the n-InP(Si) second current blocking layer 134, but still aspart of the second crystal growth. Thus, the InAlAs layer 133 (FIG. 22)is grown before mask 200 is removed. After removal of the mask 200 (FIG.23), the p-InP(Zn) cladding layer 142 and the ohmic contact layer 144are grown, followed by the formation of the n-type electrode 162 and thep-type electrode 164, to complete a buried semi-insulating ridgeheterostructure 205 (FIG. 23).

[0075] In a sixth embodiment of the present invention, which isillustrated in FIG. 24, the additional InAlAs layer 133 is grown as partof the third crystal growth, and not as part of the second crystalgrowth as in the fifth embodiment. That is, in buried semi-insulatingridge heterostructure 206 of FIG. 24, the InAlAs layer 133 is grownafter the removal of the mask 200 and before the growth of the p-InP(Zn)cladding layer 142. As illustrated in FIG. 24, the InAlAs layer 133 isgrown over the mesa stripe 151 and the Q layer 118. Both InAlAs layers115 and 131 suppress the diffusion of the Zn atoms from the p-InP(Zn)second cladding layer 116 into the active region 114, as well as thelateral diffusion of Zn from the mesa stripe and into the InP(Fe) firstcurrent blocking layer 132. Similarly, the InAlAs layer 133 furthersuppresses the interdiffusion of Zn and Fe atoms in the current blockinglayers, that is between the InP(Fe) first current blocking layer 132 andthe p-InP(Zn) cladding layer 142 of the buried semi-insulating ridgeheterostructure 206.

[0076] So far the present invention has been described in the context ofa buried semi-insulating ridge heterostructure, such as, for example,the buried semi-insulating ridge heterostructure 204 of FIG. 21.However, the invention has broader applicability and can be used, forexample, for the fabrication of a ridge structure for optoelectronicdevices, such as electroabsorption modulators and detectors. In suchcase, which is illustrated in FIG. 25, a ridge structure 209, whichresides on an upper surface of an n-InP substrate 110, comprises avertical mesa stripe 210 surrounded by insulating layers 211. Thevertical mesa stripe 210 further comprises portions of a first claddinglayer 112, of an active layer 114, of an InAlAs or InGaAlAs layer 115,of a second cladding layer 116 of p-InP(Zn), of a p-InP cladding layer142, and of a p-InGaAsP or a p-InGaAs ohmic contact layer 144.Preferably, all of the above-mentioned layers are grown selectively byMetal Organic Vapor Phase Epitaxy (MOVPE). However, Liquid Phase Epitaxy(LPE), Vapor Phase Epitaxy (VPE), or Molecular Beam Epitaxy (MBE) couldalso be used as an alternative. The insulating layers 211 are formedpreferably of polyimide by a deposition method.

[0077] The present invention provides a method for reducing thediffusion of Zn and the Zn—Fe interdiffusion among doped regions oflaser devices, optical amplifiers, modulators, or detectors. The directcontact between Zn-doped layers and Fe-doped layers is prevented and thedopant atoms interdiffusion is suppressed.

[0078] Although the invention has been illustrated for an optoelectronicdevice fabricated on an n-type substrate, the invention could also befabricated on a p-type or a semi-insulating type substrate, aswell-known in the art. This, of course, will change the doping orconductivity of the operative layers in the fabricated device. Also,although the invention has been explained in the exemplary embodimentswith reference to an InAlAs dopant blocking layer, the invention hasequal applicability to optoelectronic devices using an InGaAlAs dopantblocking layer, or a combination of both InAlAs and InGaAlAs layers, asnoted above.

[0079] The above description illustrates preferred embodiments whichachieve the features and advantages of the present invention. It is notintended that the present invention be limited to the illustratedembodiments. Modifications and substitutions to specific processconditions and structures can be made without departing from the spiritand scope of the present invention.

[0080] For example, although all embodiments of the present inventioninclude the InAlAs or InGaAlAs layer 115 (FIGS. 9-13; FIGS. 18-25)situated on top of the active region of the optoelectronic device, itmust be understood that the existence of such layer is optional inembodiments second. through six, depending on the device characteristicsand requirements. Similarly, as explained above, the embodiments of thepresent invention may include any number of additional InAlAs and/orInGaAlAs layers among the cladding and blocking layers that are dopedwith impurity atoms For example, an InAlAs and/or InGaAlAs layer may beformed between the cladding layer and the ohmic contact layer of thethird crystal growth. Accordingly, the invention is not to be consideredas being limited by the foregoing description and drawings, but is onlylimited by the scope of the appended claims.

What is claimed as new and desired to be protected by Letters Patent ofthe United States is:
 1. An optoelectronic device comprising: asubstrate of a first type conductivity; and a mesa structure provided onsaid substrate, said mesa structure having a least two sides andincluding an active region, said active region further being bounded onat least one side by a dopant blocking layer, said dopant blocking layercomprising a material selected from the group consisting of InAlAs andInGaAlAs.
 2. The optoelectronic device of claim 1 further comprising afirst current blocking layer at two sides of said mesa structure, asecond current blocking layer of a first type conductivity formed oversaid first current blocking layer, and a cladding layer of a second typeconductivity formed over said mesa structure and said second blockinglayer.
 3. The optoelectronic device of claim 1 further comprising aplurality of current blocking layers formed over said second currentblocking layer.
 4. The optoelectronic device of claim 1, wherein saiddopant blocking layer is situated on top of said active region.
 5. Theoptoelectronic device of claim 1 further comprising a doped secondcladding layer of a second type conductivity in contact with said dopantblocking layer.
 6. The optoelectronic device of claim 1, wherein saiddopant blocking layer is situated between each of said two sides of saidmesa structure and said first current blocking layer.
 7. Theoptoelectronic device of claim 1, wherein said doped second claddinglayer is doped with a p-type dopant.
 8. The optoelectronic device ofclaim 1, wherein said dopant blocking layer is an epitaxially grownlayer.
 9. The optoelectronic device of claim 1, wherein said dopantblocking layer has a thickness in the range of about 300 to 800Angstroms.
 10. The optoelectronic device of claim 1, wherein said activeregion includes a layer capable of emitting light.
 11. Theoptoelectronic device of claim 1, wherein said active region includes alayer capable of absorbing light.
 12. The optoelectronic device of claim1, wherein said active region includes a layer capable of modulatinglight.
 13. The optoelectronic device of claim 1, wherein said activeregion includes a layer capable of amplifying light.
 14. Theoptoelectronic device of claim 1, wherein said dopant blocking layercomprises at least one InAlAs layer.
 15. The optoelectronic device ofclaim 1, wherein said dopant blocking layer comprises at least oneInGaAlAs layer.
 16. The optoelectronic device of claim 1, wherein saiddopant blocking layer comprises at least one layer of InAlAs and atleast one layer of InGaAlAs.
 17. A semiconductor optical devicecomprising: a substrate of a first type conductivity; and a mesastructure provided on said substrate, said mesa structure having atleast two sides and including a dopant blocking layer, said dopantblocking layer comprising a material selected from the group consistingof InAlAs and InGaAlAs, said dopant blocking layer being further formedbetween an active region and a doped second cladding layer of a secondtype conductivity.
 18. The semiconductor optical device of claim 17further comprising a first current blocking layer at two sides of saidmesa structure, a second current blocking layer of a first typeconductivity formed over said first current blocking layer, and acladding layer of a second type conductivity over said mesa structureand said second blocking layer.
 19. The semiconductor optical device ofclaim 18 further comprising a plurality of current blocking layersformed over said second current blocking layer.
 20. The semiconductoroptical device of claim 17, wherein said doped second cladding layer isdoped with a dopant selected from the group consisting of zinc,beryllium and magnesium.
 21. The semiconductor optical device of claim17, wherein said dopant blocking layer is an epitaxially grown layer.22. The semiconductor optical device of claim 17, wherein said dopantblocking layer has a thickness in the range of about 300 to 800Angstroms.
 23. The semiconductor optical device of claim 17, whereinsaid active region includes a layer capable of emitting light.
 24. Thesemiconductor optical device of claim 17, wherein said active regionincludes a layer capable of absorbing light.
 25. The semiconductoroptical device of claim 17, wherein said active region includes a layercapable of modulating light.
 26. The semiconductor optical device ofclaim 17, wherein said active region includes a layer capable ofamplifying light.
 27. The semiconductor optical device of claim 17,wherein said dopant blocking layer comprises at least one InAlAs layer.28. The semiconductor optical device of claim 17, wherein said dopantblocking layer comprises at least one InGaAlAs layer.
 29. Thesemiconductor optical device of claim 17, wherein said dopant blockinglayer comprises at least one layer of InAlAs and at least one layer ofInGaAlAs.
 30. A method for forming a semiconductor laser comprising thesteps of: forming a plurality of stacked layers over a substrate of afirst type conductivity, at least one of said layers being an activeregion and at least another one of said layers being a dopant blockinglayer, said dopant blocking layer comprising a material selected fromthe group consisting of InAlAs and InGaAlAs; and etching said pluralityof stacked layers and said substrate to form a mesa structure on saidsubstrate.
 31. The method of claim 30 further comprising the steps offorming a first current blocking layer at two sides of said mesastructure, forming a second current blocking layer of a first typeconductivity over said first current blocking layer, and forming acladding layer of a second type conductivity over said mesa and saidsecond current blocking layer.
 32. The method of claim 30, wherein saidfirst type conductivity is n-type and said second type conductivity isp-type.
 33. The method of claim 30, wherein said first type conductivityis p-type and said second type conductivity is n-type.
 34. The method ofclaim 30 further comprising the step of forming a plurality of currentblocking layers at said two sides of said mesa structure.
 35. The methodof claim 30, wherein said dopant blocking layer suppresses the diffusionof dopants from a second cladding layer into said active region, saidsecond cladding layer being formed on top of and in contact with saiddopant blocking layer.
 36. The method of claim 35, wherein said secondcladding layer is grown selectively by metal organic vapor phaseepitaxy.
 37. The method of claim 35, wherein said second cladding layeris of a second type conductivity.
 38. The method of claim 35 furthercomprising the step of doping said second cladding layer.
 39. The methodof claim 30, wherein said dopant blocking layer is epitaxially grown.40. The method of claim 30, wherein said dopant blocking layer is grownselectively by metal organic vapor phase epitaxy.
 41. The method ofclaim 30, wherein said dopant blocking layer is grown to a thickness inthe range of about 300 to 800 Angstroms.
 42. The method of claim 30,wherein said active region includes a layer capable of emitting lightwhen excited.
 43. The method of claim 30, wherein said active regionincludes a layer capable of absorbing light.
 44. The method of claim 30,wherein said active region includes a layer capable of modulating light.45. The method of claim 30, wherein said active region includes a layercapable of amplifying light.
 46. The method of claim 30, wherein saiddopant blocking layer comprises at least one InAlAs layer.
 47. Themethod of claim 30, wherein said dopant blocking layer comprises atleast one InGaAlAs layer.
 48. The method of claim 30, wherein saiddopant blocking layer comprises at least one layer of InAlAs and atleast one layer of InGaAlAs.
 49. A semiconductor optical devicecomprising: a substrate of a first type conductivity; a mesa structureprovided on said substrate, said mesa structure having two sides andincluding an active region; and a first dopant blocking layer at twosides of said mesa structure, said dopant blocking layer comprising amaterial selected from the group consisting of InAlAs and InGaAlAs. 50.The semiconductor optical device of claim 49 further comprising aplurality of current blocking layers formed over said second currentblocking layer.
 51. The semiconductor optical device of claim 49,wherein said first dopant blocking layer comprises at least one InAlAslayer.
 52. The semiconductor optical device of claim 49, wherein saidfirs dopant blocking layer comprises at least one InGaAlAs layer. 53.The semiconductor optical device of claim 49, wherein said first dopantblocking layer is an epitaxially grown layer.
 54. The semiconductoroptical device of claim 49, wherein said first dopant blocking layer hasa thickness in the range of about 300 to 3000 Angstroms.
 55. Thesemiconductor optical device of claim 49 further comprising a firstcurrent blocking layer formed over said first dopant blocking layer, asecond current blocking layer of a first type conductivity formed oversaid first current blocking layer, and a cladding layer of a second typeconductivity formed over said mesa structure and said second blockinglayer.
 56. The semiconductor optical device of claim 55, wherein saidfirst current blocking layer is doped.
 57. The semiconductor opticaldevice of claim 56, wherein said dopant is a semi-insulating typedopant.
 58. The semiconductor optical device of claim 57, wherein saidfirst current blocking layer is an InP(Fe) layer.
 59. The semiconductoroptical device of claim 55, wherein said second current blocking layeris doped with a dopant selected from the group consisting of silicon,sulfur and tin.
 60. The semiconductor optical device of claim 55,wherein said mesa structure further comprises a second cladding layerformed over said active region.
 61. The semiconductor optical device ofclaim 55, wherein said mesa structure further comprises a second dopantblocking layer formed in between said second cladding layer and saidactive region.
 62. The semiconductor optical device of claim 61, whereinsaid second dopant blocking layer comprises a material selected from thegroup consisting of InAlAs and InGaAlAs.
 63. The semiconductor opticaldevice of claim 61, wherein said second dopant blocking layer comprisesat least one InAlAs layer.
 64. The semiconductor optical device of claim61, wherein said second dopant blocking layer comprises at least oneInGaAlAs layer.
 65. The semiconductor optical device of claim 61,wherein said second dopant blocking layer comprises at least one layerof InAlAs and at least one layer of InGaAlAs.
 66. The semiconductoroptical device of claim 49, wherein said active region includes a layercapable of emitting light.
 67. The semiconductor optical device of claim49, wherein said active region includes a layer capable of absorbinglight.
 68. The semiconductor optical device of claim 49, wherein saidactive region includes a layer capable of modulating light.
 69. Thesemiconductor optical device of claim 49, wherein said active regionincludes a layer capable of amplifying light.
 70. A semiconductoroptical device comprising: a substrate of a first type conductivity; amesa structure provided on said substrate, said mesa structure havingtwo sides and including an active region, said mesa structure furtherincluding a first dopant blocking layer in contact with said activeregion, said first dopant blocking layer comprising a material selectedfrom the group consisting of InAlAs and InGaAlAs; and a second dopantblocking layer at two sides of said mesa structure.
 71. Thesemiconductor optical device of claim 70 further comprising a firstcurrent blocking layer formed over said second dopant blocking layer, athird dopant blocking layer formed over said first current blockinglayer, and a cladding layer of a second type conductivity formed oversaid mesa structure and said third dopant blocking layer.
 72. Thesemiconductor optical device of claim 71 further comprising a pluralityof current blocking layers formed in between said first current blockinglayer and said third dopant blocking layer.
 73. The semiconductoroptical device of claim 71, wherein said second dopant blocking layercomprises a material selected from the group consisting of InAlAs andInGaAlAs.
 74. The semiconductor optical device of claim 71, wherein saidthird dopant blocking layer comprises a material selected from the groupconsisting of InAlAs and InGaAlAs.
 75. The semiconductor optical deviceof claim 71, wherein said first dopant blocking layer is situated on topof said active region.
 76. The semiconductor optical device of claim 71further comprising a doped second cladding layer of a second typeconductivity in contact with said first and second dopant blockinglayers.
 77. The semiconductor optical device of claim 76, wherein saiddoped second cladding layer is doped with a p-type dopant.
 78. Thesemiconductor optical device of claim 71, wherein said second dopantblocking layer has a thickness in the range of about 300 to 3000Angstroms.
 79. The semiconductor optical device of claim 71, whereinsaid third dopant blocking layer has a thickness in the range of about300 to 3000 Angstroms.
 80. The semiconductor optical device of claim 70,wherein said first dopant blocking layer has a thickness in the range ofabout 300 to 800 Angstroms.
 81. The semiconductor optical device ofclaim 70, wherein said active region includes a layer capable ofemitting light when excited.
 82. The semiconductor optical device ofclaim 70, wherein said active region includes a layer capable ofabsorbing light.
 83. The semiconductor optical device of claim 70,wherein said active region includes a layer capable of modulating light.84. The semiconductor optical device of claim 70, wherein said activeregion includes a layer capable of amplifying light.
 85. A semiconductoroptical device comprising: a substrate of a first type conductivity; amesa structure provided on said substrate, said mesa structure havingtwo sides and including an active region; a first current blocking layerat two sides of said mesa structure; a second current blocking layer ofa first type conductivity formed over said first current blocking layer;a first dopant blocking layer formed over said second current blockinglayer, said first dopant blocking layer comprising a material selectedfrom the group consisting of InAlAs and InGaAlAs; and a cladding layerof a second type conductivity formed over said mesa structure and saidfirst dopant blocking layer.
 86. The semiconductor optical device ofclaim 85 further comprising a second dopant blocking layer on top ofsaid active region.
 87. The semiconductor optical device of claim 86,wherein said second dopant blocking layer comprises a material selectedfrom the group consisting of InAlAs and InGaAlAs.
 88. The semiconductoroptical device of claim 86, wherein said second dopant blocking layerhas a thickness in the range of about 300 to 800 Angstroms.
 89. Thesemiconductor optical device of claim 85 further comprising a thirddopant blocking layer between said two sides of said mesa stripe andsaid first current blocking layer.
 90. The semiconductor optical deviceof claim 89, wherein said third dopant blocking layer comprises amaterial selected from the group consisting of InAlAs and InGaAlAs. 91.The semiconductor optical device of claim 89, wherein said third dopantblocking layer has a thickness in the range of about 300 to 3000Angstroms.
 92. The semiconductor optical device of claim 86 furthercomprising a doped first cladding layer of a second type conductivity incontact with said second dopant blocking layer.
 93. The semiconductoroptical device of claim 92, wherein said doped second cladding layer isdoped with a p-type dopant.
 94. The semiconductor optical device ofclaim 85, wherein said first dopant blocking layer has a thickness inthe range of about 300 to 3000 Angstroms.
 95. An optoelectronic devicecomprising: a substrate of a first type conductivity; a mesa structureprovided on said substrate, said mesa structure having two sides andincluding an active region, said active region further being bounded onat least one side by a dopant blocking layer, said dopant blocking layercomprising a material selected from the group consisting of InAlAs andInGaAlAs; and an insulating layer at two sides of said mesa structure.96. The optoelectronic device of claim 95, wherein said mesa structurefurther includes a cladding layer of a second type conductivity formedover said mesa structure, and an ohmic contact layer formed over saidcladding layer.
 97. The optoelectronic device of claim 95, wherein saiddopant blocking layer is situated on top of said active region.
 98. Theoptoelectronic device of claim 95 further comprising a doped secondcladding layer of a second type conductivity in contact with said dopantblocking layer.
 99. The optoelectronic device of claim 98, wherein saiddoped second cladding layer is doped with a p-type dopant.
 100. Theoptoelectronic device of claim 95, wherein said dopant blocking layer isan epitaxially grown layer.
 101. The optoelectronic device of claim 95,wherein said dopant blocking layer has a thickness in the range of about300 to 800 Angstroms.
 102. The optoelectronic device of claim 95,wherein said active region includes a layer capable of absorbing light.103. The optoelectronic device of claim 95, wherein said active regionincludes a layer capable of modulating light.
 104. The optoelectronicdevice of claim 95, wherein said insulating layer is formed ofpolyimide.